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Adding support for mips.

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Support for mips cpu is added to all breakapad targets including unittests.

BUG=none
TEST=unittests

Review URL: https://breakpad.appspot.com/614002



git-svn-id: http://google-breakpad.googlecode.com/svn/trunk@1212 4c0a9323-5329-0410-9bdc-e9ce6186880e
This commit is contained in:
gordana.cmiljanovic@imgtec.com 2013-09-11 11:37:04 +00:00
parent ae35566b8d
commit f78839c157
31 changed files with 2095 additions and 39 deletions
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66
src/google_breakpad/processor/stack_frame_cpu.h
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@ -270,6 +270,72 @@ struct StackFrameARM : public StackFrame {
int context_validity;
};
struct StackFrameMIPS : public StackFrame {
// MIPS callee save registers for o32 ABI (32bit registers) are:
// 1. $s0-$s7,
// 2. $sp, $fp
// 3. $f20-$f31
//
// The register structure is available at
// http://en.wikipedia.org/wiki/MIPS_architecture#Compiler_register_usage
#define INDEX_MIPS_REG_S0 MD_CONTEXT_MIPS_REG_S0 // 16
#define INDEX_MIPS_REG_S7 MD_CONTEXT_MIPS_REG_S7 // 23
#define INDEX_MIPS_REG_GP MD_CONTEXT_MIPS_REG_GP // 28
#define INDEX_MIPS_REG_RA MD_CONTEXT_MIPS_REG_RA // 31
#define INDEX_MIPS_REG_PC 34
#define SHIFT_MIPS_REG_S0 0
#define SHIFT_MIPS_REG_GP 8
#define SHIFT_MIPS_REG_PC 12
enum ContextValidity {
CONTEXT_VALID_NONE = 0,
CONTEXT_VALID_S0 = 1 << 0, // $16
CONTEXT_VALID_S1 = 1 << 1, // $17
CONTEXT_VALID_S2 = 1 << 2, // $18
CONTEXT_VALID_S3 = 1 << 3, // $19
CONTEXT_VALID_S4 = 1 << 4, // $20
CONTEXT_VALID_S5 = 1 << 5, // $21
CONTEXT_VALID_S6 = 1 << 6, // $22
CONTEXT_VALID_S7 = 1 << 7, // $23
// GP is not calee-save for o32 abi.
CONTEXT_VALID_GP = 1 << 8, // $28
CONTEXT_VALID_SP = 1 << 9, // $29
CONTEXT_VALID_FP = 1 << 10, // $30
CONTEXT_VALID_RA = 1 << 11, // $31
CONTEXT_VALID_PC = 1 << 12, // $34
CONTEXT_VALID_ALL = ~CONTEXT_VALID_NONE
};
// Return the ContextValidity flag for register rN.
static ContextValidity RegisterValidFlag(int n) {
if (n >= INDEX_MIPS_REG_S0 && n <= INDEX_MIPS_REG_S7)
return ContextValidity(1 << (n - INDEX_MIPS_REG_S0 + SHIFT_MIPS_REG_S0));
else if (n >= INDEX_MIPS_REG_GP && n <= INDEX_MIPS_REG_RA)
return ContextValidity(1 << (n - INDEX_MIPS_REG_GP + SHIFT_MIPS_REG_GP));
else if (n == INDEX_MIPS_REG_PC)
return ContextValidity(1 << SHIFT_MIPS_REG_PC);
return CONTEXT_VALID_NONE;
}
StackFrameMIPS() : context(), context_validity(CONTEXT_VALID_NONE) {}
// Register state. This is only fully valid for the topmost frame in a
// stack. In other frames, which registers are present depends on what
// debugging information were available. Refer to 'context_validity' below.
MDRawContextMIPS context;
// For each register in context whose value has been recovered,
// the corresponding CONTEXT_VALID_ bit in 'context_validity' is set.
//
// context_validity's type should actually be ContextValidity, but
// type int is used instead because the bitwise inclusive or operator
// yields an int when applied to enum values, and C++ doesn't
// silently convert from ints to enums.
int context_validity;
};
} // namespace google_breakpad
#endif // GOOGLE_BREAKPAD_PROCESSOR_STACK_FRAME_CPU_H__