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Add Arm64 version of breakpad_getcontext for Android.
This CL adds breakpad_getcontext support for Arm64 to Android. The assembly is based on getcontext.S in glibc. BUG=354405,335641 R=mark@chromium.org Review URL: https://breakpad.appspot.com/1384002 git-svn-id: http://google-breakpad.googlecode.com/svn/trunk@1302 4c0a9323-5329-0410-9bdc-e9ce6186880e
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6 changed files with 140 additions and 25 deletions
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@ -34,7 +34,7 @@
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/* int getcontext (ucontext_t *ucp) */
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#ifdef __arm__
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#if defined(__arm__)
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.text
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.global breakpad_getcontext
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@ -50,7 +50,7 @@ breakpad_getcontext:
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/* r12 is a scratch register, don't save it */
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/* Save sp and lr explicitely. */
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/* Save sp and lr explicitly. */
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/* - sp can't be stored with stmia in Thumb-2 */
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/* - STM instructions that store sp and pc are deprecated in ARM */
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str sp, [r0, #(MCONTEXT_GREGS_OFFSET + 13*4)]
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@ -59,7 +59,7 @@ breakpad_getcontext:
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/* Save the caller's address in 'pc' */
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str lr, [r0, #(MCONTEXT_GREGS_OFFSET + 15*4)]
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/* Save ucontext_t* pointer accross next call */
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/* Save ucontext_t* pointer across next call */
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mov r4, r0
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/* Call sigprocmask(SIG_BLOCK, NULL, &(ucontext->uc_sigmask)) */
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@ -88,6 +88,90 @@ breakpad_getcontext:
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.fnend
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.size breakpad_getcontext, . - breakpad_getcontext
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#elif defined(__aarch64__)
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.text
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.global breakpad_getcontext
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.hidden breakpad_getcontext
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.type breakpad_getcontext, #function
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.align 4
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.cfi_startproc
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breakpad_getcontext:
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/* The saved context will return to the getcontext() call point
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with a return value of 0 */
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str xzr, [x0, MCONTEXT_GREGS_OFFSET + 0 * REGISTER_SIZE]
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stp x18, x19, [x0, MCONTEXT_GREGS_OFFSET + 18 * REGISTER_SIZE]
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stp x20, x21, [x0, MCONTEXT_GREGS_OFFSET + 20 * REGISTER_SIZE]
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stp x22, x23, [x0, MCONTEXT_GREGS_OFFSET + 22 * REGISTER_SIZE]
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stp x24, x25, [x0, MCONTEXT_GREGS_OFFSET + 24 * REGISTER_SIZE]
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stp x26, x27, [x0, MCONTEXT_GREGS_OFFSET + 26 * REGISTER_SIZE]
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stp x28, x29, [x0, MCONTEXT_GREGS_OFFSET + 28 * REGISTER_SIZE]
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str x30, [x0, MCONTEXT_GREGS_OFFSET + 30 * REGISTER_SIZE]
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/* Place LR into the saved PC, this will ensure that when
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switching to this saved context with setcontext() control
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will pass back to the caller of getcontext(), we have
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already arranged to return the appropriate return value in x0
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above. */
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str x30, [x0, MCONTEXT_PC_OFFSET]
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/* Save the current SP */
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mov x2, sp
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str x2, [x0, MCONTEXT_SP_OFFSET]
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/* Initialize the pstate. */
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str xzr, [x0, MCONTEXT_PSTATE_OFFSET]
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/* Figure out where to place the first context extension
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block. */
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add x2, x0, #MCONTEXT_EXTENSION_OFFSET
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/* Write the context extension fpsimd header. */
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mov w3, #(FPSIMD_MAGIC & 0xffff)
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movk w3, #(FPSIMD_MAGIC >> 16), lsl #16
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str w3, [x2, #FPSIMD_CONTEXT_MAGIC_OFFSET]
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mov w3, #FPSIMD_CONTEXT_SIZE
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str w3, [x2, #FPSIMD_CONTEXT_SIZE_OFFSET]
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/* Fill in the FP SIMD context. */
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add x3, x2, #(FPSIMD_CONTEXT_VREGS_OFFSET + 8 * SIMD_REGISTER_SIZE)
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stp d8, d9, [x3], #(2 * SIMD_REGISTER_SIZE)
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stp d10, d11, [x3], #(2 * SIMD_REGISTER_SIZE)
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stp d12, d13, [x3], #(2 * SIMD_REGISTER_SIZE)
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stp d14, d15, [x3], #(2 * SIMD_REGISTER_SIZE)
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add x3, x2, FPSIMD_CONTEXT_FPSR_OFFSET
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mrs x4, fpsr
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str w4, [x3]
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mrs x4, fpcr
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str w4, [x3, FPSIMD_CONTEXT_FPCR_OFFSET - FPSIMD_CONTEXT_FPSR_OFFSET]
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/* Write the termination context extension header. */
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add x2, x2, #FPSIMD_CONTEXT_SIZE
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str xzr, [x2, #FPSIMD_CONTEXT_MAGIC_OFFSET]
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str xzr, [x2, #FPSIMD_CONTEXT_SIZE_OFFSET]
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/* Grab the signal mask */
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/* rt_sigprocmask (SIG_BLOCK, NULL, &ucp->uc_sigmask, _NSIG8) */
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add x2, x0, #UCONTEXT_SIGMASK_OFFSET
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mov x0, #0 /* SIG_BLOCK */
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mov x1, #0 /* NULL */
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mov x3, #(_NSIG / 8)
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mov x8, #__NR_rt_sigprocmask
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svc 0
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/* Return x0 for success */
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mov x0, 0
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ret
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.cfi_endproc
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.size breakpad_getcontext, . - breakpad_getcontext
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#elif defined(__i386__)
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.text
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@ -140,10 +224,6 @@ breakpad_getcontext:
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.size breakpad_getcontext, . - breakpad_getcontext
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#elif defined(__aarch64__)
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// TODO(rmcilroy): Implement for arm64.
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#elif defined(__mips__)
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#if _MIPS_SIM != _ABIO32
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