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Added riscv and riscv64 support for Linux
Change-Id: I62cd157d00a87720db001072662a81d8eb9112b0 Reviewed-on: https://chromium-review.googlesource.com/c/breakpad/breakpad/+/3873291 Reviewed-by: Mike Frysinger <vapier@chromium.org>
This commit is contained in:
Iacopo Colonnelli
Mike Frysinger
parent
e059dad5ea
commit
28cf16bc34
37 changed files with 4901 additions and 48 deletions
168
src/google_breakpad/common/minidump_cpu_riscv.h
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src/google_breakpad/common/minidump_cpu_riscv.h
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@ -0,0 +1,168 @@
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/* minidump_format.h: A cross-platform reimplementation of minidump-related
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* portions of DbgHelp.h from the Windows Platform SDK.
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*
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* (This is C99 source, please don't corrupt it with C++.)
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*
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* This file contains the necessary definitions to read minidump files
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* produced on RISCV and RISCV64. These files may be read on any platform
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* provided that the alignments of these structures on the processing system
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* are identical to the alignments of these structures on the producing
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* system. For this reason, precise-sized types are used. The structures
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* defined by this file have been laid out to minimize alignment problems by
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* ensuring that all members are aligned on their natural boundaries.
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* In some cases, tail-padding may be significant when different ABIs specify
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* different tail-padding behaviors. To avoid problems when reading or
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* writing affected structures, MD_*_SIZE macros are provided where needed,
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* containing the useful size of the structures without padding.
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*
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* Structures that are defined by Microsoft to contain a zero-length array
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* are instead defined here to contain an array with one element, as
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* zero-length arrays are forbidden by standard C and C++. In these cases,
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* *_minsize constants are provided to be used in place of sizeof. For a
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* cleaner interface to these sizes when using C++, see minidump_size.h.
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*
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* These structures are also sufficient to populate minidump files.
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*
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* Because precise data type sizes are crucial for this implementation to
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* function properly and portably, a set of primitive types with known sizes
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* are used as the basis of each structure defined by this file.
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*
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* Author: Iacopo Colonnelli
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*/
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/*
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* RISCV and RISCV64 support
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*/
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#ifndef GOOGLE_BREAKPAD_COMMON_MINIDUMP_CPU_RISCV_H__
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#define GOOGLE_BREAKPAD_COMMON_MINIDUMP_CPU_RISCV_H__
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#include "google_breakpad/common/breakpad_types.h"
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#define MD_FLOATINGSAVEAREA_RISCV_FPR_COUNT 32
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#if defined(__riscv)
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# if __riscv_flen == 32
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typedef uint32_t riscv_fpr_size;
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# elif __riscv_flen == 64
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typedef uint64_t riscv_fpr_size;
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# elif __riscv_flen == 128
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typedef uint128_struct riscv_fpr_size;
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# else
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# error "Unexpected __riscv_flen"
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# endif
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#else
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typedef uint32_t riscv_fpr_size;
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#endif
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#define MD_CONTEXT_RISCV_GPR_COUNT 32
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typedef struct {
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/* 32 floating point registers, f0 .. f31. */
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riscv_fpr_size regs[MD_FLOATINGSAVEAREA_RISCV_FPR_COUNT];
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uint32_t fpcsr;
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} MDFloatingSaveAreaRISCV;
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enum MDRISCVRegisterNumbers {
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MD_CONTEXT_RISCV_REG_PC = 0,
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MD_CONTEXT_RISCV_REG_RA = 1,
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MD_CONTEXT_RISCV_REG_SP = 2,
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};
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/* For (MDRawContextRISCV).context_flags. These values indicate the type of
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* context stored in the structure. */
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#define MD_CONTEXT_RISCV 0x00800000
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#define MD_CONTEXT_RISCV_INTEGER (MD_CONTEXT_RISCV | 0x00000001)
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#define MD_CONTEXT_RISCV_FLOATING_POINT (MD_CONTEXT_RISCV | 0x00000004)
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#define MD_CONTEXT_RISCV_FULL (MD_CONTEXT_RISCV_INTEGER | \
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MD_CONTEXT_RISCV_FLOATING_POINT)
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typedef struct {
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/* Determines which fields of this struct are populated */
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uint32_t context_flags;
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uint32_t pc;
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uint32_t ra;
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uint32_t sp;
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uint32_t gp;
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uint32_t tp;
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uint32_t t0;
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uint32_t t1;
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uint32_t t2;
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uint32_t s0;
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uint32_t s1;
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uint32_t a0;
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uint32_t a1;
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uint32_t a2;
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uint32_t a3;
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uint32_t a4;
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uint32_t a5;
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uint32_t a6;
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uint32_t a7;
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uint32_t s2;
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uint32_t s3;
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uint32_t s4;
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uint32_t s5;
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uint32_t s6;
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uint32_t s7;
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uint32_t s8;
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uint32_t s9;
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uint32_t s10;
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uint32_t s11;
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uint32_t t3;
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uint32_t t4;
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uint32_t t5;
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uint32_t t6;
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MDFloatingSaveAreaRISCV float_save;
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} MDRawContextRISCV;
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/* For (MDRawContextRISCV64).context_flags. These values indicate the type of
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* context stored in the structure. */
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#define MD_CONTEXT_RISCV64 0x08000000
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#define MD_CONTEXT_RISCV64_INTEGER (MD_CONTEXT_RISCV64 | 0x00000001)
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#define MD_CONTEXT_RISCV64_FLOATING_POINT (MD_CONTEXT_RISCV64 | 0x00000004)
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#define MD_CONTEXT_RISCV64_FULL (MD_CONTEXT_RISCV64_INTEGER | \
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MD_CONTEXT_RISCV64_FLOATING_POINT)
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typedef struct {
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/* Determines which fields of this struct are populated */
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uint32_t context_flags;
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uint64_t pc;
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uint64_t ra;
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uint64_t sp;
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uint64_t gp;
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uint64_t tp;
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uint64_t t0;
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uint64_t t1;
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uint64_t t2;
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uint64_t s0;
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uint64_t s1;
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uint64_t a0;
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uint64_t a1;
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uint64_t a2;
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uint64_t a3;
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uint64_t a4;
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uint64_t a5;
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uint64_t a6;
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uint64_t a7;
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uint64_t s2;
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uint64_t s3;
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uint64_t s4;
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uint64_t s5;
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uint64_t s6;
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uint64_t s7;
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uint64_t s8;
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uint64_t s9;
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uint64_t s10;
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uint64_t s11;
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uint64_t t3;
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uint64_t t4;
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uint64_t t5;
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uint64_t t6;
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MDFloatingSaveAreaRISCV float_save;
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} MDRawContextRISCV64;
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#endif /* GOOGLE_BREAKPAD_COMMON_MINIDUMP_CPU_RISCV_H__ */
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@ -117,6 +117,7 @@ typedef struct {
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#include "minidump_cpu_mips.h"
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#include "minidump_cpu_ppc.h"
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#include "minidump_cpu_ppc64.h"
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#include "minidump_cpu_riscv.h"
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#include "minidump_cpu_sparc.h"
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#include "minidump_cpu_x86.h"
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@ -683,6 +684,8 @@ typedef enum {
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MD_CPU_ARCHITECTURE_PPC64 = 0x8002, /* Breakpad-defined value for PPC64 */
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MD_CPU_ARCHITECTURE_ARM64_OLD = 0x8003, /* Breakpad-defined value for ARM64 */
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MD_CPU_ARCHITECTURE_MIPS64 = 0x8004, /* Breakpad-defined value for MIPS64 */
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MD_CPU_ARCHITECTURE_RISCV = 0x8005, /* Breakpad-defined value for RISCV */
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MD_CPU_ARCHITECTURE_RISCV64 = 0x8006, /* Breakpad-defined value for RISCV64 */
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MD_CPU_ARCHITECTURE_UNKNOWN = 0xffff /* PROCESSOR_ARCHITECTURE_UNKNOWN */
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} MDCPUArchitecture;
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@ -53,14 +53,16 @@ class DumpContext : public DumpObject {
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// Returns raw CPU-specific context data for the named CPU type. If the
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// context data does not match the CPU type or does not exist, returns NULL.
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const MDRawContextAMD64* GetContextAMD64() const;
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const MDRawContextARM* GetContextARM() const;
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const MDRawContextARM64* GetContextARM64() const;
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const MDRawContextMIPS* GetContextMIPS() const;
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const MDRawContextPPC* GetContextPPC() const;
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const MDRawContextPPC64* GetContextPPC64() const;
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const MDRawContextSPARC* GetContextSPARC() const;
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const MDRawContextX86* GetContextX86() const;
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const MDRawContextAMD64* GetContextAMD64() const;
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const MDRawContextARM* GetContextARM() const;
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const MDRawContextARM64* GetContextARM64() const;
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const MDRawContextMIPS* GetContextMIPS() const;
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const MDRawContextPPC* GetContextPPC() const;
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const MDRawContextPPC64* GetContextPPC64() const;
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const MDRawContextSPARC* GetContextSPARC() const;
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const MDRawContextX86* GetContextX86() const;
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const MDRawContextRISCV* GetContextRISCV() const;
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const MDRawContextRISCV64* GetContextRISCV64() const;
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// A convenience method to get the instruction pointer out of the
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// MDRawContext, since it varies per-CPU architecture.
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void SetContextARM(MDRawContextARM* arm);
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void SetContextARM64(MDRawContextARM64* arm64);
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void SetContextMIPS(MDRawContextMIPS* ctx_mips);
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void SetContextRISCV(MDRawContextRISCV* riscv);
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void SetContextRISCV64(MDRawContextRISCV64* riscv64);
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// Free the CPU-specific context structure.
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void FreeContext();
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private:
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// The CPU-specific context structure.
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union {
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MDRawContextBase* base;
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MDRawContextX86* x86;
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MDRawContextPPC* ppc;
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MDRawContextPPC64* ppc64;
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MDRawContextAMD64* amd64;
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MDRawContextBase* base;
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MDRawContextX86* x86;
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MDRawContextPPC* ppc;
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MDRawContextPPC64* ppc64;
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MDRawContextAMD64* amd64;
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// on Solaris SPARC, sparc is defined as a numeric constant,
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// so variables can NOT be named as sparc
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MDRawContextSPARC* ctx_sparc;
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MDRawContextARM* arm;
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MDRawContextARM64* arm64;
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MDRawContextMIPS* ctx_mips;
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MDRawContextSPARC* ctx_sparc;
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MDRawContextARM* arm;
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MDRawContextARM64* arm64;
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MDRawContextMIPS* ctx_mips;
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MDRawContextRISCV* riscv;
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MDRawContextRISCV64* riscv64;
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} context_;
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// Store this separately because of the weirdo AMD64 context
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int context_validity;
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};
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struct StackFrameRISCV : public StackFrame {
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enum ContextValidity {
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CONTEXT_VALID_NONE = 0,
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CONTEXT_VALID_PC = 1 << 0,
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CONTEXT_VALID_RA = 1 << 1,
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CONTEXT_VALID_SP = 1 << 2,
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CONTEXT_VALID_GP = 1 << 3,
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CONTEXT_VALID_TP = 1 << 4,
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CONTEXT_VALID_T0 = 1 << 5,
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CONTEXT_VALID_T1 = 1 << 6,
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CONTEXT_VALID_T2 = 1 << 7,
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CONTEXT_VALID_S0 = 1 << 8,
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CONTEXT_VALID_S1 = 1 << 9,
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CONTEXT_VALID_A0 = 1 << 10,
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CONTEXT_VALID_A1 = 1 << 11,
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CONTEXT_VALID_A2 = 1 << 12,
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CONTEXT_VALID_A3 = 1 << 13,
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CONTEXT_VALID_A4 = 1 << 14,
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CONTEXT_VALID_A5 = 1 << 15,
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CONTEXT_VALID_A6 = 1 << 16,
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CONTEXT_VALID_A7 = 1 << 17,
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CONTEXT_VALID_S2 = 1 << 18,
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CONTEXT_VALID_S3 = 1 << 19,
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CONTEXT_VALID_S4 = 1 << 20,
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CONTEXT_VALID_S5 = 1 << 21,
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CONTEXT_VALID_S6 = 1 << 22,
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CONTEXT_VALID_S7 = 1 << 23,
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CONTEXT_VALID_S8 = 1 << 24,
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CONTEXT_VALID_S9 = 1 << 25,
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CONTEXT_VALID_S10 = 1 << 26,
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CONTEXT_VALID_S11 = 1 << 27,
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CONTEXT_VALID_T3 = 1 << 28,
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CONTEXT_VALID_T4 = 1 << 29,
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CONTEXT_VALID_T5 = 1 << 30,
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CONTEXT_VALID_T6 = 1 << 31,
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CONTEXT_VALID_ALL = ~CONTEXT_VALID_NONE
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};
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StackFrameRISCV() : context(), context_validity(CONTEXT_VALID_NONE) {}
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// Register state. This is only fully valid for the topmost frame in a
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// stack. In other frames, which registers are present depends on what
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// debugging information were available. Refer to 'context_validity' below.
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MDRawContextRISCV context;
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// For each register in context whose value has been recovered,
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// the corresponding CONTEXT_VALID_ bit in 'context_validity' is set.
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//
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// context_validity's type should actually be ContextValidity, but
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// type int is used instead because the bitwise inclusive or operator
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// yields an int when applied to enum values, and C++ doesn't
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// silently convert from ints to enums.
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int context_validity;
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};
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struct StackFrameRISCV64 : public StackFrame {
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enum ContextValidity {
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CONTEXT_VALID_NONE = 0,
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CONTEXT_VALID_PC = 1 << 0,
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CONTEXT_VALID_RA = 1 << 1,
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CONTEXT_VALID_SP = 1 << 2,
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CONTEXT_VALID_GP = 1 << 3,
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CONTEXT_VALID_TP = 1 << 4,
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CONTEXT_VALID_T0 = 1 << 5,
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CONTEXT_VALID_T1 = 1 << 6,
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CONTEXT_VALID_T2 = 1 << 7,
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CONTEXT_VALID_S0 = 1 << 8,
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CONTEXT_VALID_S1 = 1 << 9,
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CONTEXT_VALID_A0 = 1 << 10,
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CONTEXT_VALID_A1 = 1 << 11,
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CONTEXT_VALID_A2 = 1 << 12,
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CONTEXT_VALID_A3 = 1 << 13,
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CONTEXT_VALID_A4 = 1 << 14,
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CONTEXT_VALID_A5 = 1 << 15,
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CONTEXT_VALID_A6 = 1 << 16,
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CONTEXT_VALID_A7 = 1 << 17,
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CONTEXT_VALID_S2 = 1 << 18,
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CONTEXT_VALID_S3 = 1 << 19,
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CONTEXT_VALID_S4 = 1 << 20,
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CONTEXT_VALID_S5 = 1 << 21,
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CONTEXT_VALID_S6 = 1 << 22,
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CONTEXT_VALID_S7 = 1 << 23,
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CONTEXT_VALID_S8 = 1 << 24,
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CONTEXT_VALID_S9 = 1 << 25,
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CONTEXT_VALID_S10 = 1 << 26,
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CONTEXT_VALID_S11 = 1 << 27,
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CONTEXT_VALID_T3 = 1 << 28,
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CONTEXT_VALID_T4 = 1 << 29,
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CONTEXT_VALID_T5 = 1 << 30,
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CONTEXT_VALID_T6 = 1 << 31,
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CONTEXT_VALID_ALL = ~CONTEXT_VALID_NONE
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};
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StackFrameRISCV64() : context(), context_validity(CONTEXT_VALID_NONE) {}
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// Register state. This is only fully valid for the topmost frame in a
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// stack. In other frames, which registers are present depends on what
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// debugging information were available. Refer to 'context_validity' below.
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MDRawContextRISCV64 context;
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// For each register in context whose value has been recovered,
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// the corresponding CONTEXT_VALID_ bit in 'context_validity' is set.
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//
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// context_validity's type should actually be ContextValidity, but
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// type int is used instead because the bitwise inclusive or operator
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// yields an int when applied to enum values, and C++ doesn't
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// silently convert from ints to enums.
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int context_validity;
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};
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} // namespace google_breakpad
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#endif // GOOGLE_BREAKPAD_PROCESSOR_STACK_FRAME_CPU_H__
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